1. Field of the Invention
This invention relates to semiconductor integrated circuits and more particularly to integrated circuits with trenches for inter-device isolation.
2. Description of the Prior Art
As integrated circuits become smaller, the need for effective isolation between individual devices becomes more critical. Structures used for inter-device isolation should desirably provide effective electrical isolation while occupying little space and allowing good surface planarity.
One method of inter-device isolation is the use of a field oxide between devices. Field oxides provide acceptable isolation between devices with shallow active regions. However, field oxides grown by conventional processes often exhibit birds beaks and other formations which not only cause undesirable encroachments into device areas but also adversely affect surface planarity.
Trench isolation is another way of providing inter-device isolation. Trench isolation is applicable to both bipolar and field effect transistor technologies. Trenches generally consume less space than field oxides. Traditionally, trench isolation involves etching a narrow, deep trench or groove in a silicon substrate and then filling the trench with a filler material such as a silicon oxide or polysilicon. Trenches are also often used in memory design to provide information storage capacity which requires good electrical connection to selected transistors. However, isolation trenches described here are designed to have minimal charge storage and no electrical connection to any transistor.
As already mentioned, trenches are often filled with "hard" materials such as silicon oxide or polysilicon. However, existing techniques do not permit wide variations in the dimensions of the trench. For example, if a wafer contains both large and small trenches and polysilicon is deposited so that it fills the small trenches, the large trenches will not be completely filled. Furthermore, since polysilicon deposition is not always completely conformal, voids, or at least seams, may form in the polysilicon, especially in narrow trenches. The voids may trap various impurities which may later cause reliability problems.
Another problem with the use of "hard" materials is that they may cause dislocations and other defects in the silicon substrate during subsequent high temperature processing of the wafer due to the differences in rates of thermal expansion between the "hard" filler material and the silicon substrate. Furthermore, trenches formed by traditional techniques have upper surface which are difficult to planarize. Consequently, most designers who employ trenches use them in narrow inter-device regions and use conventional thermally grown field oxides in wider inter-device regions.
Those concerned with the development of advanced semiconductor integrated circuit technology have engaged in a continuous search for improved methods of inter-device isolation and particularly for improved methods of inter-device trench formation of various sizes.
One approach to trench construction is illustrated in Becker et al., "Low Pressure Deposition of Doped SiO.sub.2 by Pyrolysis of Tetraethylorthosilicate (TEOS)", J. Electrochem. Soc., Vol. 134, No. 11, pp. 2923-2931 (1987). The publication discusses trenches which contain silicon dioxide spacers and a silicon dioxide block in the center of the trench. The silicon dioxide block effectively reduces the size of the trench cavity; thus making a wide trench into two or more narrow trenches which may, of course, be more easily filled.